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1.2 a, 20 v, 700 khz/ 1.4 mhz, nonsynchronous step - down regulator data sheet adp2300 / adp2301 rev. c document feedback information furnished by analog devices is believed to be accurate and reliable. however, no r esponsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise u nder any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2010 C 2012 analog devices, inc. all rights reserved. technical support www.analog.com features 1 .2 a maximum load current 2% output accuracy over temperature range wide input voltage range: 3.0 v to 20 v 700 khz (adp2300 ) or 1. 4 mhz (adp2301) switching frequency options high efficiency up to 91% current - mode control architecture output vo ltage from 0.8 v to 0.85 v in automatic pfm/pwm mode switching precision enable pin with hysteresis integrated high - side mosfet integrated bootstrap diode internal compensation and soft start minimum external components undervoltage lockout (uvlo) overcur rent protection (ocp) and thermal shutdown (tsd) available in ultra sma ll , 6 - lead tsot package support ed by adisimpower ? design tool applications ldo replacement for digital load applications intermediate p ower rail conversion communications and networking industrial and instrumentation healthcare and medical consumer t ypical a pplications c ircuit 3.0v t o 20v vin bst sw fb v out en on off gnd adp2300/ adp2301 08342-001 figure 1. 60 65 70 75 80 85 90 95 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) i out (a) v in = 12v v out = 5.0v f sw = 1.4mhz f sw = 700khz 08342-069 figure 2 . efficiency vs. output current genera l description the adp2300/adp2301 are compact , constant - frequency , current - mode , step - down dc - to - dc regulators with integrated power mosfet. the adp2300/adp2301 devices run from input voltage s of 3.0 v to 20 v, making them suitable for a wide range of app lications. a p recise, low voltage internal reference makes these devices ideal for generating a regulated output voltage as low as 0.8 v , with 2% accuracy, for up to 1.2 a load current. there are two frequency options : the adp2300 runs at 700 khz , and th e adp2301 runs at 1.4 mhz. these options allow users to make decisions based on the trade - off between efficiency and total solution size . current - mode control provides fast and stable line and load transient performance. the adp2300/adp2301 device s include internal soft start to prevent inrush current at power - up. other key safety features include short - circ uit protec - tion , thermal shutdown (tsd) , and input under voltage lockout (uvlo). the p recision enable pin threshold voltage allows the adp2300/adp2301 to be easily sequenced from other input/ output supplies . it can also be used as a programmable uvlo input by using a resistive divider. the adp2300/adp2301 are available in a 6 - lead tsot package and are rated for the ? 40 c to +125 c junction temperature ran ge.
adp2300/adp2301 data sheet rev. c | page 2 of 28 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 t ypical a pplications c ircuit ............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specificatio ns ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 functional block diagram ............................................................ 13 theory of operation ...................................................................... 14 basic operation .......................................................................... 14 pwm mode ................................................................................. 14 power saving mode .................................................................... 14 bootstrap circuitry .................................................................... 14 precision enable ......................................................................... 14 integrated soft start ................................................................... 14 current limit .............................................................................. 14 short - circuit protection ............................................................ 15 undervoltage lockout (uvlo) ............................................... 15 thermal shutdown ..................................................................... 15 control loop ............................................................................... 15 applications information .............................................................. 16 adisimpower design tool ....................................................... 16 programming the output voltage ........................................... 16 voltage conversion limitations ............................................... 16 low input voltage c onsiderations .......................................... 17 programming the precision enable ......................................... 17 inductor ....................................................................................... 18 catch diode ................................................................................ 19 input capacitor ........................................................................... 19 output capacitor ........................................................................ 19 thermal c onsiderations ............................................................ 20 design example .............................................................................. 21 switching frequency selection ................................................. 21 catch diode selection ............................................................... 21 inductor selection ...................................................................... 21 output capacitor selection ....................................................... 21 resistive voltage divider selection .......................................... 22 circuit board layout recommendations ................................... 23 typical application circuits ......................................................... 24 outline dimensions ....................................................................... 26 ordering guide .......................................................................... 26 revision history 11/12 rev. b to rev. c changes to ord ering guide .......................................................... 26 6/12 rev. a to rev. b change to features section ............................................................. 1 added adisimpower design tool section ................................. 16 6 /10 rev. 0 to rev. a changes to figure 5 4 ...................................................................... 25 changes to ordering guide .......................................................... 26 2 / 10 revision 0: initial version
data sheet adp2300/adp2301 rev. c | page 3 of 28 specifications v in = 3.3 v, t j = ? 40 c t o + 125 c for minimum/maximum specifications, and t a = 25 c for typical specifications, unless otherwise noted. table 1 . parameter symbol test conditions min typ max unit v in voltage range v in 3 20 v supply current i vin no switching , v in = 12 v 640 800 a shutdown current i shdn v en = 0 v, v in = 12 v 18 35 a undervoltage lockout threshold uvlo v in rising 2. 8 0 2.95 v v in falling 2.15 2. 4 0 v fb regulation voltage v fb t j = 0c to + 125 c 0. 788 0.8 00 0.81 2 v t j = ?40c to + 125c 0.784 0.800 0.816 v bias current i fb 0.01 0.1 a sw on resistance 1 v bst ? v sw = 5 v, i sw = 15 0 ma 4 4 0 7 00 m peak current limit 2 v bst ? v sw = 5 v, v in = 12 v 1.5 1. 9 2.5 a minimum on time 100 135 ns minimum off time adp2300 1 4 5 190 ns adp2301 70 120 ns oscillator frequency adp2300 0.5 0.7 0.9 mhz adp2301 1.0 1. 4 1.75 mhz soft start time adp2300 1460 s adp2301 730 s en input threshold v en 1.13 1.2 1.2 7 v input hysteresis 100 mv pul l - down current 1.2 a bootstrap voltage v boot no switching, v in = 12 v 5.0 v thermal shutdown threshold 1 4 0 c hysteresis 15 c 1 pin - to - pin measurements. 2 guaranteed by design .
adp2300/adp2301 data sheet rev. c | page 4 of 28 absolute maximum rat ings table 2 . parameter rating vin , en ? 0.3 v to + 28 v sw ? 1.0 v to + 28 v bst to sw ? 0.6 v to + 6 v bst ? 0.3 v to + 28 v fb ? 0.3 v to +3.3 v operating junction temperature range ? 40 c to +125 c storage temperature range ? 65 c to +150 c soldering conditions jedec j - std -020 stresses abov e those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. unless otherwise specified , all voltages are referenced to gnd. therm al resistance ja is specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 3 . thermal resistance 1 package type ja jc unit 6 - lead tsot 186.02 66.34 c/w 1 ja an d jc are measured using natural convection on a jedec 4 - layer board . esd caution
data sheet adp2300/adp2301 rev. c | page 5 of 28 pin configuration an d function descripti ons adp2300/ adp2301 t o p view (not to scale) 1 2 3 6 5 4 08342-002 sw vin en bst gnd fb figure 3. pin configuration table 4 . pin function descriptions pin o. nemonic description 1 bst boost supply for the high - side mosfet driver. a 0.1 f capacitor is connected between the sw and bst pins to form a floating supply to drive the gate of the mosfet switch above the v in supply voltage. 2 gnd ground. connect this pin to the ground plane. 3 fb feedback voltage sense input. connect this pin to a resistive divider from v out . set the voltage to 0.8 v for a desired v out . 4 en output enable. pull this pin high to enable the output. pull this pin low to disable th e output. this pin can also be used as a programmable uvlo input. this pin has a 1.2 a pull - down current to gnd. 5 vin power input. connect to the input power source with a ceramic bypass capacitor to gnd directly from this pin. 6 sw switch node output. connect an inductor to v out and a catch diode to gnd from this pin.
adp2300/adp2301 data sheet rev. c | page 6 of 28 typical performance characteristics v in = 3.3 v, t a = 25c, v en = v in , unless otherwise noted. 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) i out (a) inductor: lps6225-472mlc diode: b230a v out = 12v v out = 9v v out = 5.0v v out = 3.3v 08342-070 figure 4 . efficiency curve, v in = 18 v, f sw = 1.4 mhz 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) i out (a) v out = 12v v out = 9v v out = 5.0v v out = 3.3v inductor: lps6225-103mlc diode: b230a 08342-071 fig ure 5 . efficiency curve, v in = 18 v, f sw = 700 k hz i out (a) 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) v out = 5.0v v out = 3.3v v out = 2.5v inductor: lps6225-472mlc diode: b230a 08342-072 figure 6 . efficiency curve, v in = 12 v , f sw = 1.4 mhz i out (a) 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) v out = 5.0v v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v inductor: lps6225-103mlc diode: b230a 08342-073 figure 7 . efficiency curve, v in = 12 v , f sw = 700 khz i out (a) 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) v out = 2.5v v out = 1.8v v out = 1.2v inductor: lps6225-472mlc diode: b230a 08342-074 figure 8 . efficiency curve, v in = 5.0 v , f sw = 1.4 m hz i out (a) 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) v out = 2.5v v out = 1.8v v out = 1.2v inductor: lps6225-103mlc diode: b230a 08342-075 figure 9 . efficiency curve, v in = 5.0 v , f sw = 700 khz
data sheet adp2300/adp2301 rev. c | page 7 of 28 08342-089 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) i out (a) v out = 1.8v v out = 1.2v v out = 0.8v inductor: lps6225-472mlc diode: b230a figure 10. efficiency curve, v in = 3.3 v with external 5.0 v bootstrap bi as voltage , f sw = 1.4 m hz 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 efficienc y (%) v out = 1.8v v out = 1.2v v out = 0.8v inductor: lps6225-103mlc diode: b230a i out (a) 08342-066 figure 11. efficiency curve, v in = 3.3 v with external 5.0 v bootstrap bias voltage , f sw = 700 khz ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 0.2 0 0.4 0.6 0.8 1.0 1.2 load regul a tion (%) f sw = 1.4mhz f sw = 700khz i out (a) 08342-067 figure 12 . load regulation , v out = 3.3 v , v in = 12 v ?0.20 ?0.15 ?0.10 ?0.05 0 0.05 0.10 0.15 0.20 5 8 1 1 14 17 20 line regul a tion (%) f sw = 1.4mhz f sw = 700khz v in (v) 08342-068 figure 13 . line regulation , v out = 3.3 v , i out = 500 ma 400 600 800 1000 1200 1400 1600 ?50 ?20 10 40 70 100 130 frequenc y (khz) temper a ture (c) f sw = 1.4mhz f sw = 700khz 08342-076 figure 14 . frequency vs . temperature 400 600 800 1000 1200 1400 1600 frequenc y (khz) f sw = 1.4mhz f sw = 700khz 2 5 8 1 1 14 17 20 v in (v) 08342-077 figure 15 . frequency vs . v in
adp2300/adp2301 data sheet rev. c | page 8 of 28 0 5 10 15 20 25 30 35 40 2 5 8 1 1 14 17 20 shutdown current ( a) v in (v) t j = ?40c t j = +25c t j = +125c 08342-078 figure 16 . shutdown current vs . v in 0.792 0.794 0.796 0.798 0.800 0.802 0.804 ?50 ?20 10 40 70 100 130 0.8v feedback vo lt age (v) temper a ture (c) 08342-079 figure 17 . 0.8 v feedback voltage vs . temperature 80 85 90 95 100 105 1 10 minimum on time (ns) ?50 ?20 10 40 70 100 130 temper a ture (c) 08342-080 figure 18 . minimum on time vs. temperature 0 20 40 60 80 100 120 140 160 ?50 ?20 10 40 70 100 130 minimum off time (ns) f sw = 1.4mhz f sw = 700khz temper a ture (c) 08342-081 figure 19 . minimum off time vs. temperature 0 0.5 1.0 1.5 2.0 2.5 2 5 8 1 1 14 17 20 current limit (a) v in (v) 08342-082 figure 20 . current - limit threshold vs . v in , v bst ? v sw = 5.0 v ?50 ?20 10 40 70 100 130 0 0.5 1.0 1.5 2.0 2.5 current limit (a) temper a ture (c) 08342-083 figure 21 . current - limit threshold vs . temp erature
data sheet adp2300/adp2301 rev. c | page 9 of 28 500 540 580 620 660 700 quiescent current ( a) 2 5 8 1 1 14 17 20 v in (v) t j = ?40c t j = +25c t j = +125c 08342-084 figure 22 . quiescent current vs . v in 0 100 200 300 400 500 600 700 800 900 ?50 ?20 10 40 70 100 130 mosfet r ds (on) (m ? ) v gs = 5v v gs = 4v v gs = 3v temper a ture (c) 08342-085 figure 23 . mosfet r ds ( on ) vs . temperature (pin - to- pin measurements) 1.00 1.05 1.10 1.15 1.20 1.25 1.30 ?50 ?20 10 40 70 100 130 enable threshold (v) rising falling temper a ture (c) 08342-086 figure 24 . enable threshold vs . temp erature 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 ?50 ?20 10 40 70 100 130 uvlo threshold (v) rising falling temper a ture (c) 08342-087 figure 25 . uvlo threshold vs . temp erature ch1 5mv ch4 500m a ? ch2 5v m400ns a ch2 7.4v 2 4 1 b w b w b w v out il sw 08342-024 figure 26 . steady state at heavy load , f sw = 1.4 mhz, i out = 1 a ch1 20mv ch4 200m a ? ch2 5v m10 s a ch2 8v 2 4 1 b w b w b w v out il sw 08342-025 figure 27 . steady state at light load , f sw = 1.4 mhz, i out = 40 ma
adp2300/adp2301 data sheet rev. c | page 10 of 28 ch1 1v ch4 500m a ? ch2 10v m100 s a ch3 8v 2 4 3 1 b w ch3 10v b w b w b w v out il en sw 08342-026 figure 28 . soft start with 1 a resistance load , f sw = 1.4 mhz ch1 1v ch4 500m a ? ch2 10v m100 s a ch3 8v 2 4 3 1 b w ch3 10v b w b w b w v out il en sw 08342-027 figure 29 . s oft start with no load , f sw = 1.4 mhz 08342-057 2 1 4 v out i out sw ch1 100mv ch4 500m a ? ch2 10v m100s a ch4 580m a b w b w b w figure 30 . adp2301 load transient, 0.2 a to 1.0 a , v out = 5.0 v, v in = 12 v (f sw = 1.4 mhz, l = 4.7 h, c out = 10 f) 08342-058 2 1 4 v out i out sw ch1 50mv ch4 500ma ? ch2 10v m100 s a ch4 630m a b w b w b w figure 31 . adp2301 load transient, 0.2 a to 1.0 a , v out = 3.3 v, v in = 12 v (f sw = 1.4 mhz, l = 4.7 h, c out = 22 f) 08342-059 2 1 4 v out i out sw ch1 200mv ch4 500ma ? ch2 10v m100 s a ch4 630m a b w b w b w figure 32 . adp2300 load transient, 0.2 a to 1.0 a , v out = 5.0 v, v in = 12 v (f sw = 700 khz, l = 10 h, c out = 22 f) 08342-060 2 1 4 v out i out sw ch1 100mv ch4 500ma ? ch2 10v m100 s a ch4 630m a b w b w b w figure 33 . adp2300 load transient, 0.2 a to 1.0 a , v out = 3.3 v, v in = 12 v (f sw = 700 khz, l = 10 h, c out = 22 f)
data sheet adp2300/adp2301 rev. c | page 11 of 28 08342-061 1 3 v out v in sw ch1 5mv ch3 5v ch2 10v m1ms a ch3 1 1.4v b w b w 2 figure 34 . adp2301 line transient, 7 v to 1 5 v , v out = 3.3 v, i out = 1.2 a , f sw = 1.4 mh z ch1 1v ch4 1 a ? ch2 10v m10 s a ch1 2.56v 2 4 1 b w b w b w v out sw 08342-033 il figure 35 . adp2301 short - circuit entry, v out = 3.3 v (f sw = 1.4 mhz ) ch1 1v ch4 1 a ? ch2 10v m100 s a ch1 1.2v 2 4 1 b w b w b w v out sw 08342-034 il figure 36 . adp2301 short - circuit recovery, v out = 3.3 v (f sw = 1.4 mhz ) ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 ?200 ?160 ?120 ?80 ?40 0 40 80 120 160 200 1k 10k 100k 1 2 1m 08342-062 magnitude [b/a] (db) phase [b/a] (degrees) cross frequenc y : 127khz phase margin: 5 3 frequency (hz) figure 37 . adp2301 bode plot, v out = 5.0 v, v in = 12 v (f sw = 1.4 mhz , l = 4.7 h, c out = 10 f) 08342-063 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 ?200 ?160 ?120 ?80 ?40 0 40 80 120 160 200 1k 10k 100k 2 1m magnitude [b/a] (db) phase [b/a] (degrees) cross frequenc y : 80khz phase margin: 68 1 frequency (hz) figure 38 . adp2301 bode plot, v out = 3.3 v, v in = 12 v (f sw = 1.4 mhz , l = 4.7 h, c out = 22 f) 08342-064 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 ?200 ?160 ?120 ?80 ?40 0 40 80 120 160 200 1k 10k 100k 1 2 1m magnitude [b/a] (db) phase [b/a] (degrees) cross frequenc y : 27khz phase margin: 76 frequency (hz) figure 39 . adp2300 bode plot, v out = 5.0 v, v in = 12 v (f sw = 700 khz , l = 10 h, c out = 22 f)
adp2300/adp2301 data sheet rev. c | page 12 of 28 08342-065 ?100 ?80 ?60 ?40 ?20 0 20 40 60 80 100 ?200 ?160 ?120 ?80 ?40 0 40 80 120 160 200 1k 10k 100k frequency (hz) 1 2 1m magnitude [b/a] (db) phase [b/a] (degrees) cross frequenc y : 47khz phase margin: 77 figure 40 . adp2300 bode plot, v out = 3.3 v, v in = 12 v (f sw = 700 khz , l = 10 h, c out = 22 f)
data sheet adp2300/adp2301 rev. c | page 13 of 28 functional block diagram 1 6 2 5 4 3 v in vin oc p 250mv/ a 0.5v ov p therma l shutdown shutdown logic uvlo boot regul a t or clk gener a t or frequenc y foldback ( f sw , ? f sw , ? f sw ) r s q ram p gener a t or shutdown ic 0.90v 1.20v 1.2 a 0.8v 90pf 0.7pf 220k ? on en off v bias = 1.1v v fb bst gnd sw v out 08342-038 adp2300/adp2301 fb figure 41 . adp2300 /adp2301 functional block diagram
adp2300/adp2301 data sheet rev. c | page 14 of 28 theory of operation the adp2300/adp2301 are non synchronous , step - down dc - to - dc regulators , each with an integrated high - side power mosfet. a h igh switching frequency and ultra small , 6 - lead tsot package allow small step - down dc - to - dc regulator solution s. the adp2300/adp2301 can operate with an input voltage from 3.0 v to 20 v while regulat ing an output voltage down to 0.8 v. the adp2300/adp2301 are available in two fixed - frequency options: 700 khz (adp2300) and 1.4 mhz ( adp2301). basic operation the adp2300/adp2301 use the fixed - frequency, peak current - mode pwm control architecture at medium to high loads, but shift to a pulse - skip mode control scheme at light loads to reduce the switching power losses and improve effici ency. when the devices operat e in fixed - frequency pwm mode, output regulation is achieved by controlling the duty cycle of the integrated mosfet. when the devices operat e in pulse - skip mode at light loads, the output voltage is controlled in a hysteretic m anner with higher output ripple. in this mode of operation , the regulator periodi cally stop s switching for a few cycles, thus keeping the conversion losses minimal to improve efficiency. pwm mode in pwm mode, the adp2300/adp2301 operate at a fixed frequen cy, set by an internal oscillator. at the start of each oscillator cycle, the mosfet switch is turned on, sending a positive voltage across the inductor. the inductor curr ent increases until the current - sense signal crosses the peak inductor current thresh old that turns off the mosfet switch ; this threshold is set by the error amplifier output . during the mosfet off time, the inductor current declines through the external diode until the next oscillator clock pulse starts a new cycle. the adp2300/adp2301 re gulate the output voltage by adjusting the peak inductor current threshold. power saving mode to achieve higher efficiency, the adp2300/adp2301 smoothly transition to the pulse - skip mode when the output load decreases below the pulse - skip current threshol d. when the output voltage dips below regulation, the adp2300/adp2301 enter pwm mode for a few oscillator cycles until the voltage increase s to within regulation. during the idle time between bursts, the mosfet switch is turned off, and the output capacito r supplies all the output current. since the pulse - skip mode comparator monitors the internal compensation node, which represent s the peak inductor current information, the average pulse - skip load current threshold depends on the input voltage ( v in ) , the output voltage ( v out ) , the inductor , and the output capacitor . because the output voltage occasionally dips below regulation and then recovers, the output voltage ripple in the power saving mode is larger than the ripple in the pwm mode of operation. boot strap circuitry the adp2300/adp2301 each ha ve an integrated boot regulator, which requires that a 0.1 f ceramic capacitor (x5r or x7r) be placed between the bst and sw pins to provide the gate drive voltage for the high - side mosfet. there must be at least a 1.2 v difference between the bst and sw pins to turn on the high - side mosfet. this voltage should not exceed 5.5 v in case the bst pin is supp lied with an external voltage source through a diode. the adp2300/adp2301 generate a typical 5.0 v bootstrap vo ltage for a gate drive circuit by differentially sensing and regulating the voltage between the bst and sw pins. a diode integrated on the chip block s the reverse voltage between the v in and bst pins when the mosfet switch is turned on. precision enable t he adp2300/ adp23 01 feature a precision enable circuit that has a 1.2 v reference voltage with 100 mv hysteresis. when the voltage at the en pin is greater than 1.2 v, the part is enabled. if the en voltage falls below 1.1 v, the chip is disabled. the p reci sion enable threshold voltage allows the adp2300/adp2301 to be easily sequenced from other input/output supplies . it can also be used as programmable uvlo input by using a resistive divider. an internal 1.2 a pull - down current prevent s error s if the en pi n is floating. integrated soft start the adp2300/adp2301 include internal soft start circuitry that ramps the output voltage in a controlled manner during start up, thereby limiting the inrush current. the soft start time is typically fixed at 1460 s for t he adp2300 and at 730 s for the adp2301. current limit the adp2300/adp2301 include current - limit protection circuit ry to limit the amount of positive current flowing through the high - side mosfet switch. the positive current limit on the power switch limit s the amount of current that can flow from the input to the output.
data sheet adp2300/adp2301 rev. c | page 15 of 28 short - circuit protection the adp2300/adp2301 include frequency foldback to prevent output current run away when there is a hard short on the output. the switching frequency is reduced when the voltage at the fb pin drops below a certain value, which allows more time for the inductor current to decline , but increases the ripple current while regulating the peak current. this results in a reduction in average output current and prevent s outpu t current runaway . the corre - lation between the switching frequency and the fb pin voltage is shown in table 5 . table 5 . correlation between the switching frequency and the fb pin voltage fb pin voltage sw itching frequency v fb 0.6 v f sw 0.6 v > v fb > 0.2 v ? f sw v fb 0.2 v ? f sw when a hard short (v fb 0.2 v) is removed, a soft start cycle is initiated to regulate the output back to its level during normal operation, which helps to limit the inrush current and prevent possible overshoot on the output voltage. undervoltage lockout (uvlo) the adp2300/adp2301 ha ve fixed, internally set undervoltage lockout circuitry . if the input voltage drops below 2. 4 v, the adp2300/adp2301 shut down and the mosfet switch turn s off. afte r the voltage rises again above 2.8 v , the soft start period is initiated, and the part is enabled. thermal shut do wn if the adp2300/adp2301 junction temperature rises above 140 c, the thermal shutdown circuit disables the chip. extreme junction temperature can be the result of high current operation , poor circuit board design , or high ambient temperature. a 15 c hysteresis is included so that when thermal shutdown occurs, the adp2300/adp2301 do not return to operation until the on - chip temperature drops bel ow 1 25 c. after the devices recover from thermal shutdown, a soft start is initiated. control loop the adp2300/adp2301 are internally compensated to minimize external component count and cost. in addition, the built - in slope compensation helps to prevent s ubharmonic oscillations when the adp2300/adp2301 operat e at a duty cycle greater than or close to 50%.
adp2300/adp2301 data sheet rev. c | page 16 of 28 applications informa tion adi sim p ower design tool the adp 2300 /adp 2301 are supported by the adisimpow er design tool set. adisimpower is a collection of tools that produce complete power designs optimized for a specific design goal. the tools enable the us er to generate a full schematic and bill of materi als, and calculate performance in minutes. adisimpower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the ic an d all real external components. for more information about adisimpower design tools, refer to www.analog.com/adisimpower . the tool set is available from th is website, and users can request an unpopulated board through the tool. programming the output voltage the output voltage of the adp2300/adp2301 is externally set by a resistive voltage divider from the output voltage to the fb pin, as shown in figure 42 . suggested resistor values for the typical output voltage setting are listed in table 6 . the equation for the output voltage setting is ? ? ? ? ? ? ? ? + = 2 1 1 v 800 . 0 fb fb out r r v where: v out is the output voltage. r fb1 is the feedback resistor from v out to fb. r fb2 is the feedback resistor from fb to gnd . adp2300/ adp2301 v out r fb1 r fb2 fb 08342-039 figure 42 . programming the output voltage using a resistive voltage divider table 6 . suggested values for resistive voltage divider v out (v) r fb1 (k), 1% r fb2 (k), 1% 1.2 4.99 10 1.8 12.7 10.2 2.5 21.5 10.2 3.3 31.6 10.2 5.0 52.3 10 voltage conversion l imitations there are both lower and upper output voltage limitations for a given input voltage due to the minimum on time, the minimum o ff time, and the bootstrap dropout voltage . the lower limit of the output voltage is constrained by the finite , controllable minimum on time, which can be as high as 135 ns for the worst case. by considering the variation of both the switching frequency an d the input vo ltage, the equation for the lower limit of the output voltage is d d in sw on min out v v v f t v ? + = ) ( (max) (max) - (min) where : v in(max) is the maximum input voltage . f sw(max ) is the maximum switching frequency for the worst case . t min - on is the minimum controllable on tim e . v d is the diode forward drop. the upper limit of the output voltage is constrained by the mini - mum controllable off time, which can be as high as 120 ns in the adp2301 for the worst case. by considering the variation of both the switching frequency and the input voltage, the equation for the upper limit of the output voltage is d d in sw off min out v v v f t v ? + ? = ) ( ) 1 ( (min) (max) - (max) where : v in(min) is the minimum input voltage . f sw(max) is the maximum switching frequency for the worst case . v d is the diode forward drop . t min - off is th e minimum controllable off time . in addition, the b ootstrap circuit limits the minimum input voltage for the desired output due to internal dropout voltage . to attain stable operation at light load s and en sur e proper start up for the pre bias condition, the adp2300/adp2301 require the voltage difference between the input voltage and the regulated output voltage (or be tween the input voltage and the pre bias voltage) to be greater than 2.1 v for the worst case. if the voltage difference is smaller, the bootstra p circuit rel ies on some minimum load current to char ge the boost capacitor for start up. figure 43 shows the typical required minimum input voltage vs . load current for the 3.3 v output voltage.
data sheet adp2300/adp2301 rev. c | page 17 of 28 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 1 10 100 1k load current (ma) minimum v in (v) for startup for running v out = 3.3v f sw = 1.4mhz figure 43 . minimum input voltage vs. load current based on three conversion limitations (the minimum on time, the minimum off time, and the bootstrap drop out voltage), figure 44 shows the voltage conversion limitation s. 08342-055 22 17 v in (v) v out (v) 12 7 2 2 4 6 8 10 12 14 16 0 maximum input for adp2300 maximum input for adp2301 minimum input for adp2300/adp2301 figure 44 . v oltage conversion limitations low input voltage co nsiderations for low input voltage between 3 v and 5 v, the internal boot regulator cannot provide enough 5.0 v bootstrap voltage due to the internal dropout voltage . as a result, th e increased mosfet r ds(on) reduce s the available load current. to pre ve nt this, add an external small - signal schottky diode from a 5.0 v external bootstrap bias voltage. because the absolute maximum rating between the bst and sw pins is 6.0 v, the bias vol tage should be less than 5.5 v. figure 45 shows the application diagram for the external boo t strap circuit. 3v ~ 5v vin bst sw fb en on off gnd adp2300/ adp2301 08342-042 schottk y diode 5v bias vo lt age figure 45 . external bootstrap circuit for low input voltage application programming the preci sion enable generally , the en pin can be easily tied to the v in pin so that the device automatic ally start s up when the input power is applied. however, the precision enabl e feature allows the adp2300/ adp2301 to be used as a programmable uvlo by connectin g a resistive voltage divider to v in , as shown in figure 46 . this configuration prevents the start - up problems that can occur when v in ramps up slowly in soft start with a relatively high load current. adp2300/ adp2301 vin v in en r en1 r en2 08342-043 figure 46 . precision enable used as a programmable uvlo the precision enable feature also allows the adp2300/adp2301 to be sequenced precisely by using a resistive voltage divider with another dc - to - dc output supply , as shown in figure 47. adp2300/ adp2301 en r en1 r en2 08342-044 other dc- t o-dc output figure 47 . precision enable used as a sequencing control from ano ther dc - to - dc output with a 1.2 a pull - down current on the en pin, t he equation for the start - up voltage in figure 46 and figure 47 is v 2 . 1 a 2 . 1 v 2 . 1 1 2 + ? ? ? ? ? ? ? ? + = where: v startup is the start - up voltage to enable the chip . r en1 is the resistor from the dc source to en. r en2 is the resistor from en to gnd.
adp2300/adp2301 data sheet rev. c | page 18 of 28 inductor the high switching frequency of the adp 2300/adp2301 allows the use of small inductors. for best performance, use inductor values between 2 h and 10 h for adp2301 , and use inductor values between 2 h and 22 h for adp2300 . the peak - to - peak inductor current ripple is calculated using the foll owing equation: ? ? ? ? ? ? ? ? + + ? = ? d in d out sw out in ripple v v v v f l v v i ) ( where: f sw is the switching frequency. l is the inductor value. v d is the diode forward drop. v in is the input voltage. v out is the output voltage. inductor s of smaller values are usually smaller in size and les s expensive, but increase the ripple current and the output voltage ripple. as a guideline, the induc tor peak - to - peak current ripple should typically be set to 30% of the maximum load current for optimal transient response and efficiency. the refore, the in ductor value is calculat ed using the following equation: ( ) ? ? ? ? ? ? ? ? + + ? = d in d out sw load out in v v v v f i v v l (max) 3 . 0 where i load(max) is the maximum load current. the inductor peak current is calculated using the following equation: 2 (max) ripple load peak i i i ? + = the minimum current rating of the inductor must be greater than the inductor peak current. for ferrite core inductors with a quick saturation characteristic, the inductor saturation current rating should be higher than the switch current - limit threshold to prevent the inductor from reachin g its saturation point . be sure to validate the worst - case condition , in which there is a shorted output , over the intended temperature range. inductor conduction losses are caused by the flow of current through the inductor, which is associated with the i nternal dc resistance ( dcr ) . larger sized inductors have smaller dcr and, therefore, may reduce inductor conduction losses. however, i nductor core losses are also related to the core material and the ac flux swing, which are affected by the peak - to - peak i nduc - tor ripple current. because the adp2300/adp2301 are high switching frequency regulators , shielded ferrite core materials are recommended for their low core losses and low emi. some recommended inductors are shown in table 7 . table 7 . recommended inductors vend o r value ( h) part no. dcr (m) i sat (a) dimensions l w h (mm) coilcraft 4.7 lps6225 - 472mlc 65 3.1 6.0 6.0 2.4 6.8 lps6225 - 682mlc 95 2.7 6.0 6.0 2.4 10 lps6225 - 103mlc 105 2.1 6.0 6.0 2.4 sumida 4.7 cdrh5d28rhpnp - 4r7n 43 3.7 6.2 6.2 3.0 4.7 cdrh5d16np - 4r7n 64 2.15 5.8 5.8 1.8 6.8 cdrh5d28rhpnp - 6r8n 61 3.1 6.2 6.2 3.0 6.8 cdrh5d16np - 6r8n 84 1.8 5.8 5.8 1.8 10 cdrh5d28rhpnp - 100m 93 2.45 6.2 6.2 3.0 cooper bussmann 4.7 sd53 - 4r7 - r 39 2.1 5.2 5.2 3.0 6.8 sd53 - 6r8 - r 59 1.85 5.2 5.2 3.0 10 dr73 - 100 -r 65 2.47 7.6 7.6 3.5 toko 4.7 b1077as - 4r7n 34 2.6 7.6 7.6 4.0 6.8 b1077as - 6r8n 40 2.3 7.6 7.6 4.0 10 b1077as - 100m 58 1.8 7.6 7.6 4.0 tdk 4.7 vlc5045t - 4r7m 34 3.3 5.0 5.0 4.5 6.8 vlc5045t - 6r8m 46 2.7 5.0 5.0 4.5 10 vlc5045t - 100m 66 2.1 5.0 5.0 4.5
data sheet adp2300/adp2301 rev. c | page 19 of 2 8 catch diode the catch diode conducts the inductor current during the off time of the internal mosfet. the average current of the diode in normal operation is, therefore, dependent on the duty cycle of the regulator as well as the output load current. (max) ) ( 1 load d in d out avg diode i v v v v i ? ? ? ? ? ? ? ? + + ? = where v d is the diode forward drop. the only reason to select a diode with a higher current rating than necessary in normal operation is for the worst - case condition , in which t here is a shorted output. in this case, the diode current increase s up to the typical peak current - limit threshold . be sure to consult the diode data sheet to ensure that the diode can operate well within the thermal and electrical limits. the reverse brea kdown voltage rating of the diode must be higher than the highest input voltage and allow an appropriate margin for the ringing that may be present on the sw node. a schottky diode is recommended for best efficiency because it has a low forward voltage dro p and fast switching speed. table 8 provides a list of recommended schottky diodes. table 8 . recommended schottky diodes vend o r part no. v rrm (v) i avg (a) on semiconductor mbrs230lt3 30 2 mbrs240lt3 40 2 diodes inc. b230a 30 2 b240a 40 2 vishay sl23 30 2 ss24 40 2 input capacitor the input capacitor must be able to support the maximum input operating voltage and the maximum rms input current. the maximum rms input current flowing through the inp ut capacitor is i load(max) /2. select an input capacitor capable of withstanding the rms input current for an applications maxi - mum load current using the following equation : ) 1 ( (max) ) ( d d i i load rms in ? = where d is the duty cycle and is equal to d in d out v v v v d + + = the recommended input capacit or is ceramic with x5r or x7r dielectrics due to its low esr and small temperature coefficients. a capacitance of 10 f should be adequate for most applications. to minimize supply noise, place the input capacitor as c lose to the vin pin of the adp2300/adp2301 as possible. output capacitor the output capacitor selection affects both the output voltage ripple and the loop dynamics of the regulator . the adp2300/adp2301 are designed to operate with small ceramic capacitor s that have low equivalent series resistance ( esr ) and equ ivalent series inductance (esl) and are, therefore, easily able to meet stringent output voltage ripple specifications. when the regulator operates in forced continuous conduction mode, the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor esr plus the voltage ripple caused by charging and discharging the output capacitor . ? ? ? ? ? ? ? ? + ? = ? out c out sw ripple ripple esr c f i v 8 1 capacitors with lower esr are preferable to guarantee low ou tput voltage ripple, as shown in the following equation: ripple ripple c i v esr out ? ? ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. x5r or x7r dielectrics are recommended fo r best performance, due to their low esr and small temperature coefficients. y5v and z5u dielectrics are not recommended because of their poor temperature and dc bias characteristics. in general, most applications using the adp2301 (1.4 mhz switching frequ ency ) require a minimum output capacitor value of 10 f , whereas most applications using the adp2300 (700 khz switching frequency ) require a minimum output capacitor value of 20 f. some recommended output capacitors for v out 5.0 v are listed in table 9 . table 9 . recommended capacitors for v out ? 5.0 v vendor value part no. dimensions l w h (mm) murata 10 f, 6.3 v grm31mr60j106ke19 3.2 1.6 1.15 22 f, 6.3 v grm3 1cr60j226ke19 3.2 1.6 1.6 tdk 10 f, 6.3 v c3216x5r0j106k 3.2 1.6 1.6 22 f, 6.3 v c3216x5r0j226m 3.2 1.6 0.85
adp2300/adp2301 data sheet rev. c | page 20 of 28 thermal consideratio ns the adp2300/adp2301 store the value of the inductor current only during the on time of the internal mosfe t. therefore, a small amount of power is dissipated inside the adp2300/adp2301 package, which reduces thermal constraints. however, when the application is operating under maximum load with high ambient temperature and high duty cycle, the heat dissipated within the package may cause the junction temperature of the die to exceed the maximum junction temperature of 125c. if the junction temperature exceeds 140c, the regulator goes into thermal shutdown and recovers when the junction temperature drops belo w 125c. the junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as indicated in the following equation: t j = t a + t r where: t j is the junction tempe rature. t a is the ambient temperature. t r is the rise in temperature of the package due to power dissipation. the rise in temperature of the package is directly proportional to the power dissipation in the package. the proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: t r = ja p d where: t r is the rise in temperature of the package. ja is the thermal resistance from the junction of the die to the ambient temperature of the package. p d is the po wer dissipation in the package.
data sheet adp2300/adp2301 rev. c | page 21 of 28 design example th is section provi des the procedures to select the external com - ponents , based on the example specifications listed in table 10. the schematic for this design example is shown in figure 48. table 10. step - down dc -to - dc regulator requirements parameter specification additional requirements input voltage, v in 12.0 v 10% none output voltage, v out 3.3 v, 1.2 a, 1% v out ripple at ccm mode none programmable uvlo voltage v in start - up voltage approxi mately 7.8 v none switching frequency selection select the switching frequency 700 khz (adp2300) or 1.4 mhz (adp2301) using the conversion limitation curve shown in figure 44 to assess the conversion limitation s (the minimum on time, the minimum off time , and the bootstrap dropout voltage). for example, in figure 44 v in = 12 v 10% is within the conver - sion limitation for both the 700 khz and 1.4 mhz switching frequenc ies for an output voltage of 3.3 v, but choos ing the 1.4 mhz switching frequency provides th e smallest sized solution. if higher efficiency is required, choose the 700 khz option; however, the pcb footprint area of the regulator will be larger because of the bigger inductor and output cap acitors. catch diode selectio n select the catch diode . a schottky diode is recommended for best efficiency because it has a low forward voltage drop and faster switching speed. the average current of the catch diode in normal operation , with a typical scho ttky diode forward voltage, can be calculated using the following equation: (max) ) ( 1 load d in d out avg diode i v v v v i ? ? ? ? ? ? ? ? + + ? = where: v out = 3.3 v . v in = 12 v . i load (max) = 1.2 a . v d = 0.4 v . therefore, i diode(avg) = 0.85 a. however, for the worst - case condition , in which there i s a shorted output, the diode current would be increased to 2 a typical, deter - mined by the peak switch current limit (see table 1 ). in this case, selecting a b230a , 2.0 a/ 30 v surface - mount schottky diode would result in more re liable operation. inductor selection select the inductor by using the following equation : ( ) ? ? ? ? ? ? ? ? + + ? = (max) 3 . 0 where: v out = 3.3 v . v in = 12 v . i load(max) = 1.2 a . v d = 0.4 v . f sw = 1.4 mhz . this results in l = 5.15 h . the closest standard value is 4.7 h ; therefore, i ripple = 0.394 a. the inductor peak current is calculated using the following equation: 2 (max) ripple load pea i i i ? + = where: i load(max) = 1.2 a . i ripple = 0.394 a . t herefore, the calculated peak current for the inductor is 1.397 a. however, to protect the i nductor from reaching its saturation point in the current - limit condition, the inductor should be rated for at least a 2.0 a saturati on current for reliable operation. output capacitor sel ection select the output capacitor b ased on the output voltage ripp le requirement, according to the following equation: ? ? ? ? ? ? ? ? + ? = ? 8 1 where: i ripple = 0.394 a . f sw = 1.4 mhz . v ripple = 33 mv . if the esr of the ceramic capacitor is 3 m, then c out = 1.2 f. because the output capacitor is one of the two external components that control the loop stability, most applications using the adp2301 ( 1.4 mhz switching frequency ) require a minimum 10 f capaci - tance to ensure stability. according to the recommended external components in table 11 , choose 22 f with a 6.3 v voltage rating for this example .
adp2300/adp2301 data sheet rev. c | page 22 of 28 resistive voltage di v ider selection to select the appropriate resistive voltage divider , first calculate the output feedback resistive voltage divider , and then calculate the resistive voltage divider for the programmable v in start - up voltage . t he output feedback resistive vo ltage divider is ? ? ? ? ? ? ? ? + = 2 1 1 v 800 . 0 fb fb out r r v for the 3.3 v output voltage, choose r fb1 = 31.6 k and r fb2 = 10.2 k as the feedback resistive voltage divider , according to the recommended values in table 11. t he resistive voltage div ider for the programmable v in start - up voltage is v 2 . 1 a 2 . 1 v 2 . 1 1 2 + ? ? ? ? ? ? ? ? + = en en startup r r v i f v startup = 7.8 v, choose r en2 = 10.2 k, and then calculate r en1 , which in this case is 56 k. v in = 12v vin bst sw fb en gnd adp2301 (1.4mhz) 08342-045 r3 56k ? 1% r2 10.2k ? 1% r1 31.6k ? 1% c2 22f 6.3v d1 b230a c3 0.1f 6.3v l1 4.7h 2.0a v out = 3.3v 1.2a r4 10.2k ? 1% c1 10f 25v figure 48 . schematic for the design example table 11. recommended external components for typical applications at 1.2 a output load part number v in (v) v out (v) i out (a) l (h) c out ( f ) r fb1 (k ), 1% r fb2 (k ), 1% adp2300 (700 khz) 18 3.3 1.2 10 22 31.6 10.2 18 5.0 1.2 15 22 5 2.3 10 12 1.2 1.2 6.8 2 22 4.99 10 12 1.8 1.2 6.8 2 22 12.7 10.2 12 2.5 1.2 10 22 21.5 10.2 12 3.3 1.2 10 22 31.6 10.2 12 5.0 1.2 10 22 52.3 10 9 3.3 1.2 10 22 31.6 10.2 9 5.0 1.2 10 22 52.3 10 5 1.8 1.2 4.7 2 22 12.7 10.2 5 2. 5 1.2 4.7 22 21.5 10.2 adp2301 (1.4 mhz) 18 3.3 1.2 4.7 22 31.6 10.2 18 5.0 1.2 6.8 10 52.3 10 12 2.5 1.2 4.7 22 21.5 10.2 12 3.3 1.2 4.7 22 31.6 10.2 12 5.0 1.2 4.7 10 52.3 10 9 3.3 1.2 4.7 22 31.6 10.2 9 5.0 1.2 4.7 10 52.3 10 5 1.8 1.2 2.2 2 22 12.7 10.2 5 2.5 1.2 2.2 22 21.5 10.2
data sheet adp2300/adp2301 rev. c | page 23 of 28 circuit board layout recommendations good circuit board layout is essential to obtain the best performance from the adp2300/adp2301 . poor layout can affect the regulation and st ability, as well as the e lectro magne tic interface (emi) and electro magnetic compatibility (emc) performance. a pcb layout example is shown in figure 50. refer to the following guidelines for a good pcb layout: ? place the input capacitor, inductor, catch di ode, output capacitor, and bootstrap capacitor close to the ic using short traces. ? ensure that the high current loop traces are as short and wide as possible. the high current path is shown in figure 49. ? maximize the size of grou nd metal on the component side to improve thermal dissipation. ? use a ground plane with several vias connecting to the component side ground to further reduce noise inter - f erence on sensitive circuit nodes. ? m inimize the length of the fb trace connecting the top of the feedback resistive voltage divider to the output . in addition, keep these traces away from the high current traces and the switch node to avoid noise pickup. vin bst sw fb en gnd adp2300/ adp2301 08342-046 figure 49 . typical application circuit with high current tr aces shown in blue 08342-056 i nduc t o r l 1 c 1 c 2 c 3 o u t p u t c a p i n p u t ca p b s t ca p d 1 ca t ch d i o d e r f b 1 r f b 2 adp2300/adp2301 figure 50 . recommended pcb layout for the adp2300/adp2301
adp2300/adp2301 data sheet rev. c | page 24 of 28 typical application circuits v in = 12v vin bst sw fb en gnd adp2300 (700khz) 08342-052 r3 100k? 5% r2 10k? 1% r1 4.99k ? 1% c3 22f 6.3v c2 22f 6.3v c1 10f 25v d1 b230a c4 0.1f 6.3v l1 6.8h 2.0a v out = 1.2v 1.2a on off figure 51 . adp2300 700 khz typical application, v in = 12 v, v out = 1.2 v/1.2 a with external enabling v in = 12v vin bst sw fb en gnd adp2300 (700khz) 08342-051 r3 100k ? 5% r2 10.2k ? 1% r1 12.7k ? 1% c3 22f 6.3v c2 22f 6.3v c1 10f 25v d1 b230a c4 0.1f 6.3v l1 6.8h 2.0a v out = 1.8v 1.2a on off figure 52 . adp2300 700 khz typical application, v in = 12 v, v out = 1.8 v/1.2 a with external enabling v in = 12v vin bst sw fb en gnd adp2300 (700khz) 08342-050 r3 100k ? 5% r2 10.2k ? 1% r1 21.5k ? 1% c2 22f 6.3v d1 b230a c3 0.1f 6.3v c1 10f 25v l1 10h 2.0a v out = 2.5v 1.2a on off figure 53 . adp2300 700 khz typical application, v in = 12 v, v out = 2.5 v/1.2 a with exte rnal enabling
data sheet adp2300/adp2301 rev. c | page 25 of 28 v in = 12v vin bst sw fb en gnd adp2301 (1.4mhz) 08342-049 r3 56k ? 1% c1 10f 25v r2 10.2k ? 1% r1 31.6k ? 1% c2 22f 6.3v d1 b230a c3 0.1f 6.3v l1 4.7h 2.0a v out = 3.3v 1.2a r4 10.2k ? 1% figure 54 . adp2301 1.4 mhz typical application, v in = 12 v, v out = 3.3 v/1.2 a ( with programmable 7.8 v start - up input voltage) v in = 12v vin bst sw fb en gnd adp2301 (1.4mhz) 08342-048 r3 100k ? 5% r2 10k ? 1% r1 52.3k ? 1% c2 10f 6.3v c1 10f 25v d1 b230a c3 0.1f 6.3v l1 4.7h 2.0a v out = 5v 1.2a on off figure 55 . adp2301 1.4 mhz typical application, v in = 12 v, v out = 5.0 v/1.2 a with external enabling 08342-090 v in = 18v vin bst sw fb en gnd adp2301 (1.4mhz) r3 100k ? 5% r2 10.2k ? 1% r1 52.3k ? 1% c2 10f 6.3v d1 b230a c3 0.1f 6.3v c1 10f 25v l1 6.8h 2.0a v out = 5.0v 1.2a on off figure 56 . adp2301 1.4 mhz typical application, v in = 18 v, v out = 5.0 v/1.2 a with external enabling 08342-091 v in = 9v vin bst sw fb en gnd adp2301 (1.4mhz) r3 100k ? 5% r2 10.2k ? 1% r1 31.6k ? 1% c2 22f 6.3v d1 b230a c3 0.1f 6.3v c1 10f 25v l1 4.7h 2.0a v out = 3.3v 1.2a on off figure 57 . adp2301 1.4 mhz typical application, v in = 9 v , v out = 3.3 v/1.2 a with external enabling 08342-092 v in = 5v vin bst sw fb en gnd adp2301 (1.4mhz) r3 100k ? 5% r2 10.2k ? 1% r1 12.7k ? 1% c2 22f 6.3v c3 22f 6.3v d1 b230a c4 0.1f 6.3v c1 10f 25v l1 2.2h 2.0a v out = 1.8v 1.2a on off figure 58 . adp2301 1.4 mhz typical application, v in = 5 v, v out = 1.8 v/1.2 a with external enabling
adp2300/adp2301 data sheet rev. c | page 26 of 28 outline dimensions 102808- a * compliant to jedec standards mo-193-aa with the exception of package height and thickness. 1 3 4 5 2 6 2.90 bsc 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.10 max * 1.00 max pin 1 indic a t or * 0.90 0.87 0.84 0.60 0.45 0.30 0.50 0.30 0.20 0.08 se a ting plane 8 4 0 figure 59 . 6- lead thin small outline transistor package [tsot] (uj - 6) dimensions shown in millimeters ordering guide model 1 switching frequency temperature range package description package option branding adp2300aujz -r2 700 khz ? 40c to + 125 c 6 - lead thin small outline transistor package [tsot] uj -6 l87 adp2300aujz -r7 700 khz ? 40c to + 125 c 6 - lead thin small outline transistor package [tsot] uj -6 l87 adp2300 - evalz evaluation board adp2301aujz -r2 1.4 mhz ? 40c to + 125 c 6 - lead thin small outline transistor package [tsot] uj -6 l86 adp2301aujz -r7 1.4 mhz ? 40 c to + 125 c 6 - lead thin small outline transistor package [tsot] uj -6 l86 adp2301 - evalz evaluation board 1 z = rohs compliant part.
data sheet adp2300/adp2301 rev. c | page 27 of 28 notes
adp2300/adp2301 data sheet rev. c | page 28 of 28 notes ?2010C2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d08342-0-11/12(c)

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